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NEA-1327 CAPCAL.

CAPCAL, 3-D Capacitance Calculator for VLSI Purposes

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1. NAME OR DESIGNATION OF PROGRAM:  CAPCAL.
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2. COMPUTERS
To submit a request, click below on the link of the version you wish to order. Only liaison officers are authorised to submit online requests. Rules for requesters are available here.
Program name Package id Status Status date
CAPCAL V1.2 NEA-1327/01 Tested 02-FEB-1995
CAPCAL V1.3 NEA-1327/04 Tested 06-OCT-2004
CAPCAL V1.3 NEA-1327/05 Tested 06-OCT-2004

Machines used:

Package ID Orig. computer Test computer
NEA-1327/01 Many Computers DEC VAX 6000
NEA-1327/04 HP W.S. HP 9000
NEA-1327/05 IBM PC PC Pentium
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3. DESCRIPTION OF PROGRAM OR FUNCTION

CAPCAL is devoted to the calculation of capacitances of three-dimensional wiring configurations are typically used in VLSI circuits. Due to analogies in the mathematical description also conductance and heat transport problems can be treated by CAPCAL. To handle the problem using CAPCAL same approximations have to be applied to the structure under investigation:
- the overall geometry has to be confined to a finite domain by using symmetry-properties of the problem
- Non-rectangular structures have to be simplified into an artwork of multiple boxes.
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4. METHOD OF SOLUTION

The electrical field is described by the Laplace-equation. The differential equation is discretized by using  the finite difference method.
NEA-1327/01
The linear equation system is  solved by using a combined ADI-multigrid method.

NEA-1327/04
The linear equation system is solved by using a conjugate gradient method for CAPCAL V1.3.

NEA-1327/05
The linear equation system is solved by using a conjugate gradient method for CAPCAL V1.3.
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5. RESTRICTIONS ON THE COMPLEXITY OF THE PROBLEM
NEA-1327/01
Certain restrictions of use may arise from the dimensioning of arrays. Field lengths are  defined via PARAMETER-statements which can easily by modified. If the geometry of the problem is defined such that Neumann boundaries  are dominating the convergence of the iterative equation system solver is affected.
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6. TYPICAL RUNNING TIME

Strongly depending on problem-size. Around 1
hour on a 1 MIPS machine.
NEA-1327/01
- The following Table displays the CPU (elapsed) time necessary to run the main processor CAP2 on each of the three sample problems on the VAX 6000-510 machine (running VMS) and on the DEC 3000 Model 300 X (ALPHA AXP architecture workstation running OSF/1).
                             --------------------------
                             |     Time (seconds)     |
          ---------------------------------------------
          |  Sample Problem  |  VAX/VMS  |  ALPHA/OSF |
          |    (filename)    |   (CPU)   |  (elapsed) |
          ---------------------------------------------
          |                  |           |            |
          |    CAP11.INP     |   285.2   |    35.6    |
          |                  |           |            |
          ---------------------------------------------
          |                  |           |            |
          |    CAP21.INP     |   200.3   |    24.1    |
          |                  |           |            |
          ---------------------------------------------
          |                  |           |            |
          |    CAP31.INP     |   208.6   |    22.0    |
          |                  |           |            |
          ---------------------------------------------

NEA-1327/04
A few seconds

NEA-1327/05
A few seconds
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7. UNUSUAL FEATURES: UNUSUAL FEATURES OF THE PROGRAM
NEA-1327/04
Distributed as executable program, no source code included.
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8. RELATED AND AUXILIARY PROGRAMS:
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9. STATUS
Package ID Status date Status
NEA-1327/01 02-FEB-1995 Tested at NEADB
NEA-1327/04 06-OCT-2004 Tested at NEADB
NEA-1327/05 06-OCT-2004 Tested at NEADB
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10. REFERENCES

- A. Seidl et al.:
  IEEE Trans. CAD, Vol.7, No.5 (May 1988).
- H. Klose et al.:
  Proceedings of the 1988 International Electronic Devices and
  Materials Symposium
  National Sun Yat-sen University Kaohsiung, Taiwan, R.O.C.
NEA-1327/01, included references:
- A. Seidl:
  User's Guide for CAPCAL - The 3D-Capacitance Calculation for VLSI
  Purposes Version 1.2
  (July 1986).
NEA-1327/04, included references:
- A. Seidl and Joachim Obemdorfer:
CAPCAL, The 3D-Capacitance Calculator for VLSI Purposes
Version 1.3, Users Guide (October 1991)
http://www.elektrotechnik.hs-magdeburg.de/mitarbeiter/seidl/forsch/
NEA-1327/05, included references:
- A. Seidl and Joachim Obemdorfer:
CAPCAL, The 3D-Capacitance Calculator for VLSI Purposes
Version 1.3, Users Guide (October 1991) for on-line help only
http://www.elektrotechnik.hs-magdeburg.de/mitarbeiter/seidl/forsch/
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11. HARDWARE REQUIREMENTS: MACHINE REQUIREMENTS
NEA-1327/01
- VAX or any other machine running a FORTRAN-77 compiler
- REGIS or other graphics terminal
- The test cases were run at the NEA-DB on both DEC VAX-6000 and an ALPHA/OSF work station.

NEA-1327/04
- HP workstation running HP-UX

NEA-1327/05
- PC running MS Windows
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12. PROGRAMMING LANGUAGE(S) USED
Package ID Computer language
NEA-1327/01 FORTRAN-77
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13. SOFTWARE REQUIREMENTS: OPERATING SYSTEM UNDER WHICH PROGRAM IS EXECUTED
NEA-1327/01
Source codes were compiled on the VAX-6000 under VMS Version 5.5-2 with the DEC FORTRAN-77 compiler; and on the DEC 3000  Model 300X ALPHA AXP Architecture Workstation under DEC OSF/1 V2.1 using the DEC FORTRAN (f77) V3.4 compiler.

NEA-1327/04
HP-UX B.11.11

NEA-1327/05
- MS WINDOWS 2000 Professionnal (US version)
- MS WINDOWS XP Professionnal (German version)
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14. OTHER PROGRAMMING OR OPERATING INFORMATION OR RESTRICTIONS:
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15. NAME AND ESTABLISHMENT OF AUTHORS

         Albert Seidl*
         Fachbereich Elektrotechnik
         Fachhochschule Magdeburg
         Am Kroekentor 8
         39104 Magdeburg, Germany
  
         Helmut Klose
         Siemens AG
         Otto Hahn Ring 6
         8000 Muenchen 83, Germany
  
         Mildos Svoboda
         Preysingstr.11
         8000 Muenchen 80, Germany
  
* Contact
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16. MATERIAL AVAILABLE
NEA-1327/04
CAPCAL.DOC     Manual as MS Word document
clean   Script to delete output files
manex1.inp     Sample input
manex2.inp     Sample input
run_capc.al    Script to run capcal
run_cape.x4    Script to run the network postprocessor
run_scre.enp   Script to plot the computed results
NEA generated sample output files for manex1.inp
NEA generated sample output files for manex2.inp
cap3.exe       Program to plot the results
cap3post.exe   Program to create a postscript plot file
capex1.exe     Capcal preprocessor
capex2.exe     Capcal linear equation solver
capex3.exe     Capcal postprocessor
capex4.exe     Network postprocessor

NEA-1327/05
Setup files
Setup cabinet files
Setup application file
NEA generated sample output files for manex1.cap
NEA generated sample output files for manex2.cap
User's guide as online help
NEA-1327/01
File name File description Records
NEA1327_01.001 CAPCAL Information File 482
NEA1327_01.002 Pre-processor source file for VAX/VMS 2842
NEA1327_01.003 Main processor source file for VAX/VMS 5038
NEA1327_01.004 Post processor source file for VAX/VMS 2128
NEA1327_01.005 Include file # 1 46
NEA1327_01.006 Include file # 2 61
NEA1327_01.007 Include file # 3 10
NEA1327_01.008 Include file # 4 22
NEA1327_01.009 Command file to create VMS executable files 9
NEA1327_01.010 Command file to run the sample problems 23
NEA1327_01.011 Pre-processor source file - ALPHA workstatio 2842
NEA1327_01.012 Main processor source file - ALPHA workstati 5048
NEA1327_01.013 Post processor source file - ALPHA workstati 2128
NEA1327_01.014 Sample problem # 1 (input file) 42
NEA1327_01.015 Sample problem # 2 (input file) 65
NEA1327_01.016 Sample problem # 3 (input file) 37
NEA1327_01.017 Sample output file # 1 (VAX/VMS) 952
NEA1327_01.018 Sample output file # 2 (VAX/VMS) 151
NEA1327_01.019 Sample output file # 3 (VAX/VMS) 139
NEA1327_01.020 Sample output file # 1 (ALPHA workstation) 952
NEA1327_01.021 Sample output file # 2 (ALPHA workstation) 151
NEA1327_01.022 Sample output file # 3 (ALPHA workstation) 139
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17. CATEGORIES
  • T. Electronics, Engineering Equipment, and Energy Systems Studies

Keywords: VLSI, electronic circuits, heat, three-dimensional.